chip area的意思

chip area中文翻譯：

切屑通道；基片面積

相似詞語短語

crisper chip───脆片

chip shot───打高球；近穴擊球；削球；n.[體]近穴擊球

potato chip───n.炸土豆片

chip dale───奇普戴爾

chip ingram───芯片ingram

chip gaines───奇普·蓋恩斯

said chip───奇普說

computer chip───電腦芯片

mint chip───薄荷片

雙語使用場景

Thus, software radio DDFS based on CORDIC algorithm can help to reduce chip area, power dissipation and cost.───所以CORDIC算法來實現軟件無線電直接數字頻率合成器有助于節省芯片面積、降低功耗、減少成本。

Thus, only a very small extra chip area is required even if full scan design is used.───這樣，即使采用全掃描設計，也僅需較小的芯片面積。

Its circuit structure is very complex and its chip area is restricted severely by the client.───其電路結構十分復雜，而且客戶又對版圖面積做了詳細的規定。

Since this year, show couplet to ever also expressed publicly to there can be a few significant progresses in chip area for many times.───本年以來，閃聯也曾屢次暗地暗示在芯片區域會有一些主要進展。

These CAN controllers require a greater chip area, however, and are therefore more expensive.───因此這些可能控制器要求一個更加巨大的芯片區域，然而，并且是更加昂貴的。

To a commercial chip, area is a crucial factor, because the price of chip is decided by it.───在芯片的商業應用中，面積決定了芯片的價格，更是芯片生命力的決定因素。

Because the circuit is simple, the tuning circuit has less chip area and less power consumption.───因為比較簡單的電路，這個電路有較小的晶片面積和較低的能量損耗。

英語使用場景

This flip-flop has correct logic function as a dynamic D flip-flop, and has the distinct advantage of simple structure, small chip area, and simple two-phase clock.

The divider based on a dual-modulus prescaler and pulse-swallow counter is designed to reduce power consumption and chip area.

Because the circuit is simple, the tuning circuit has less chip area and less power consumption.

Also, the added schottky diode can be easily realized by schottky contact in the drain of the NMOSFET, which does not add chip area.

By using a ring voltage controlled oscillator(VCO), chip area and production cost were saved.

The invention can effectively position a defect memorizer without increasing the chip area, and is convenient for defect analysis and design improvement.

On the aspect of chip architecture, considering the factors such as parallelizable of hardware, utilization of memory and chip area, we embodied 9 scan engines on chip to realize the multi-scan.

A charge scaling D/A converter with capacitor voltage divider is designed, which extends the resolution of a parallel D/A converter as well as reduces the chip area greatly.

Thus, only a very small extra chip area is required even if full scan design is used.