delay lines的意思
delay lines中文翻譯:
[電子]延遲線
delay───v.延期;(使)耽擱;推遲;n.延遲的時間;延期;延時;延遲器;n.(Delay)(美)德萊(人名)
lines───v.排成一行;畫線于(line的三單形式);n.線;臺詞;航線(line的復數);n.(Lines)人名;(英)萊恩斯
appreciable delay───明顯延遲
irritating delay───刺激性延遲
flight delay───航班延誤
time delay───時間延遲; 時延; 延時; 落后;延時,延遲
delay time───[電子]延遲時間,推遲時間;延遲時間,滯后時間,緩發時間; 時延
delay to───延遲到
ambidexterity delay───雙靈巧延遲
SAW dispersive delay lines using the slant array compressor technique have been applied to the pulse compression systems.───采用傾斜陣列壓縮器技術制作的聲表面波色散延遲線已成功用于許多脈沖壓縮系統中。
design and fabrication of BAW delay lines with ultra short delay time are described.───敘述了超短延時聲體波微波延遲線的設計和制作。
Continuously tunable optical delay lines greatly increase the delay accuracy and are the technological trend.───連續可調技術大大提高了延遲精度,代表了光延遲線的發展方向。
Today we offer products from coax connectors and delay lines to surface mount assemblies.───目前公司提供涵蓋同軸連接器、延遲線和表面貼裝組件等系列產品及服務。
MICROWAVE DEVICES. ACTIVE DELAY LINES.───超高頻裝置.有源延遲線
Performance Analysis of Fiber Delay Lines and Tunable Wavelength Converters for Contention Resolution in Optical Packet Switched Networks───光纖延遲線和可調諧波長轉換器在光分組交換網絡競爭解決結構中的性能分析
Contention Resolution in Optical Packet Switched Networks: Using Fiber Delay-Lines or Wavelength Converters───光分組交換網絡的沖突解決:用光纖延遲線還是波長轉換器
Optimization design of the length encoder of optical fiber delay lines───光纖延遲線長度編碼優化設計
Research on Continuously Tunable Optical Delay Lines───連續可調光延遲線技術研究
Many early computers were serial, since they were built round serial storage media such as delay lines.
The design and fabrication of BAW delay lines with ultra short delay time are described.
This paper mostly introduces the application of the magnetoelectric layered hybrid structures in the delay lines, resonators and phase shifters.
The approximation model is proposed to address the problem of dimensioning fiber delay lines for optical buffers for self-similar traffic with variable packet length.
RN1406 Pinout: RCDs digital delay lines have been designed to provide precise tap delays with all the necessary drive and pick-off circuitry.
This method combines series and parallel variable delay lines, and measures skew and jitter of clocks using high precision phase detector based on the DLL (Delay-Locked Loop) theory.
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