floating-point adder的意思

floating-point adder中文翻譯：

浮點加法器

相似詞語短語

floating point───浮點，浮點法，浮點小數點；[計]浮點

floating point overflow───浮點溢出

adder───n.蝰蛇（歐洲產的小毒蛇）；加算器；豬鼻蛇（北美產無毒的）

invalid floating point operation───浮點運算無效

floating───v.漂浮（float的現在分詞）；adj.流動的；漂浮的，浮動的

floating point division by zero───浮點除零

floating shelves───浮動貨架

death adder───致死毒蛇

floating restaurants───浮動餐廳

雙語使用場景

structure and logical designing, we get a high-speed and effective LOD circuit, which applied in floating-point adder.───我們從LOD的組成結構和邏輯兩個方面進行設計，實現了一種快速、高效的LOD電路。

Floating-point Adder is a critical part in the coprocessor, which is attached to the computing basis of floating-point instructions.───浮點加法器是協處理器的核心運算部件，是實現浮點指令各種運算的基礎，其設計優化是提高浮點運算速度和精度的關鍵途徑。

Floating-point adder is one of the basic parts of CPU. Its performance has a direct effect on CPU floating-point processing capacity.───浮點加法器是構成CPU的基本部件之一，其性能優劣將直接影響CPU浮點處理能力。

Design and Optimization of a Fast Floating Point Adder───一種快速浮點加法器的設計與優化方法

Optimized Design of a Fast Floating-point Adder───快速浮點加法器的優化設計

The FPGA Implementation of the Triple Data-path Floating-point Adder───三數據通道浮點加法器的FPGA實現

Full-custom Implementation of Fast Floating-point Adder───快速浮點加法器的全定制設計

The Combined Design of the Three Carry Propagation in the Floating- Point Adder───浮點加法器中進位傳遞問題的合并處理

On the Multi-Input Floating-Point Adder Algorithm───多輸入浮點加法器算法研究

英語使用場景

Floating-point adder is one of the basic parts of CPU. Its performance has a direct effect on CPU floating-point processing capacity.

High-Speed Floating-point Adder is a critical part in the coprocessor, which is attached to the computing basis of floating-point instructions.

The speed of floating-point adder is important factor for DSP performance. The speed of LOD is key factor for floating-point adder performance.

Through the structure and logical designing, we get a high-speed and effective LOD circuit, which applied in floating-point adder.

The main research area is the structure optimization of floating-point adder, which is intent to minimize the delay of floating-point addition and optimize the circuit structure.

The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.