青年中文boundary scan的意思
boundary scan中文翻譯：
[計]邊界掃描
boundary───n.邊界；范圍；分界線
boundary line───邊界線；疆界線；受恩的，義務的; 界線
collision boundary───碰撞邊界
obed boundary───obed邊界
scan it───掃描一下
boundary rider───n.牧場巡修圍欄工人
divergent boundary───[海洋][地質]離散邊界
boundary condition───邊界條件，極限條件；[數]邊界條件，界面條件
diathermal boundary───透熱邊界
As a kind of new developing BIT technology, Boundary scan technology is widely used in industry.───邊界掃描技術作為一種新興的BIT技術，在工業界內得到了廣泛的應用。
Some problems in logic cluster boundary scan test could not be neglected.───邏輯簇的邊界掃描測試存在一些不可忽視的重要問題。
There are some common methods of design for testability, such as boundary scan test and so on.───目前常見的可測試性設計方法主要有改善設計法、結構設計法和邊界掃描測試法等幾種。
Therefore the method making use of boundary scan structure to carry out a debugging on system arises at the historic moment.───因此利用邊界掃描結構來對系統進行調試的方法應運而生。
Boards with limited electrical access (including boundary scan) require higher emphasis on automated inspection.───帶有有限電路包括邊界掃描的印板更強調自動檢測。
Boundary-scan technology (BST) is a new and effective way of test and design-for-testability ( DFT ) for VLSI circuits.───邊界掃描技術是一種新型的VLSI電路測試及可測性設計方法。
Grand scale IC chip that every important company produces at present is almost all having the boundary scan structure.───并且目前各大公司生產的超大規模集成電路芯片基本全部具有邊界掃描結構。
Fault injection emulation platform based on Joint Test Action Group(JTAG) boundary scan and dynamic partial reconfiguration is proposed.───提出基于JTAG邊界掃描技術和動態局部重配置的錯誤注入模擬平臺。
At first this thesis gives the background and current situation of the boundary scan technology.───本文首先闡述了邊界掃描技術產生的背景以及發展現狀。
Meanwhile, how to control the boundary scan bus is mentioned in this paper. As in usual, most devices have no JTAG test access ports, the techniques discussed in this paper are valu...
With the continual improvement of the chip's integration level and complexity of print circuit board, the application of boundary scan test technology becomes wider and wider in testing ICs.
Aiming at the defects of BIT system in one new type airborne radar, this paper presents a board level BIT test technique based on boundary scan.
Establishing an unite interface of chip test and debug which embodies the boundary scan and complements the full scan.
Based on the research of boundary scan and cluster test, a cluster test system is designed with test Bus controller chip, then it is verified with the GNS algorithm of W-A.
Users can use this boundary - scan master controller to complete boundary scan test more expediently and efficiently.