bit parallel的意思

bit parallel中文翻譯：

位并行

相似詞語短語

parallel───vt.使…與…平行；adj.平行的；類似的，相同的；n.平行線；對比

parallel park───平行停車

parallel parking───縱列式停車

parallel circuit───[電]并聯電路，平行電路

parallel space───平行空間

bit───adj.很小的；微不足道的；n.[計]比特（二進位制信息單位）；少量；馬嚼子；輔幣；老一套；一點，一塊；adv.有點兒；相當；vt.咬（bite的過去式和過去分詞）；vt.控制

parallel processing───[計]并行處理；平行加工；并行處理，多重處理

in parallel───并行的，平行的；并行的；并聯的；平行的

bit by bit───一點兒一點兒地，逐漸地; 點點滴滴; 一點一滴；一點一點地

雙語使用場景

advantage of dual basis bit parallel multiplier in terms of the scale of hardware is explained.───說明了對偶基比特并行乘法器在硬件規模上的優越性。

method of designing a parameter configurable and multi-bit parallel BCH decoder is studied in this paper.───本文對可配置參數的多位并行bch譯碼器的設計方法進行了研究。

This paper present a new method which can accomplish the CRC check with only one 64 - bit parallel CRC check unit.───本文提出了一種只需64位的校驗單元即可實現其CRC校驗的方法。

Data is read from the part via a 12-bit parallel data bus with standard CS and RD signals.───該器件的讀取數據通過具有標準CS和RD信號的12位并行數據總線進行。

SPI compatible interface and a 16-bit Parallel Port───SPI兼容接口和16位并行端口

Design of Bit-Parallel RS Encoder Based on Weak Dual Basis───弱對偶基下比特并行RS編碼器的設計

High-Speed Data Acquisition System with 16-bit Parallel Interface Based on PC───一種基于PC機的高速16位并行數據采集接口

英語使用場景

A high - speed data acquisition system with a 16 bit parallel interface based on PC is described.

This paper present a new method which can accomplish the CRC check with only one 64- bit parallel CRC check unit.

The experimental results prove that this 16 Bit parallel data communication interface attains the performance index and accomplishes the task of c...

Based on these, an algorithm to optimize MDS codes is introduced by analyzing the complexity of bit parallel multipliers.

The presentation of the finite field elements in WDB is studied. And based on the computing method for the optimum WDB, the design for the bit parallel multiplier of finite field is presented.

By selecting the bit parallel multiplier based on WDB and the modified BM iterative algorithm that can avoid inversion, the widely used RS decoder is constructed.

The output number delivers to 8 section of LED after 74164 outputs8 bit parallel data, the realization survey data demonstration, realizes visibly count...

The advantage of dual basis bit parallel multiplier in terms of the scale of hardware is explained.