reset signal的意思
reset signal中文翻譯:
復位信號
signal───adj.顯著的;作為信號的;n.(Signal)人名;(瑞典)西格納爾;vt.標志;用信號通知;表示;n.信號;暗號;導火線;vi.發信號
signal wire───[通信]信號線
radio signal───無線電訊號;無線電信號
reset tooltips───重置工具提示
a reset───重置
reset drum───復位鼓
reset lockout───復位鎖定
home signal───進站信號(機);[鐵路]進站信號;[鐵路]進站信號機
alarm reset───報警復位
memory cell and a data line are controlled with a reset signal, so that data can be reliably outputted in the semiconductor device.───存儲單元和數據線用復位信號來控制,以使數據可在該半導體器件中被可靠地輸出。
Internal reset signal is activated when the timer count value reaches 0 (time-out).───當定時器計數值達到0(超時),內部復位信號有效。
In most applications, the (manual-reset) pin usually connects to a switch to create a manual-reset signal to the supervisory chip.───在大多數應用中,(手動復位)引腳通常與開關相連,為管理芯片制造手動復位信號。
A memory cell and a data line are controlled with a reset signal, so that data can be reliably outputted in the semiconductor device.───存儲單元和數據線用復位信號來控制,以使數據可在該半導體器件中被可靠地輸出。
The reset unit outputs the reset signal according to the outputting outer signal and the system power of the power system.───重置單元,根據電源系統所輸出的外部電源信號以及系統電壓大小,輸出重置信號。
Function. When the timer stop, given by the switch a reset signal, made all XianShiGuan all reset.───當計時停止的時候,由開關給出一個清零信號,使得所有顯示管全部清零。
The reading circuit comprises at least one column amplifier (CA), and when the column amplifier is reset, a column amplifier reset signal is generated.
A memory cell and a data line are controlled with a reset signal, so that data can be reliably outputted in the semiconductor device.
While the internal reset signal is being applied to the CPU, the rate of a refresh signal being generated by a DRAM controller for refreshing data in DRAM is increased.
The schemes to dispose of reset signal and clock signal in VHDL high-level synthesis are given also.
Asynchronous reset, synchronous release of many of the specific design, the key is how to ensure simultaneous release of the reset signal.
The invention is used for regulating the time for charging the capacitor, further adjusts the maximum duty cycle of the reset signal and improves the output ripple of the buck converter.
Prior to the first level transmitted, a RESET signal shall be transmitted followed by a NULL START code.
Then, when the external reset signal is disabled, a delayed reset signal DLYRST is generated and applied to the DRAM controller so that it is reset.
The reset unit is used for determining whether to generate a reset signal according to the level of the power supply voltage when receiving the first voltage from the over-temperature protection unit.
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