青年中文target state的意思
target state中文翻譯：
n.[計]目標狀態
target───n.（Target）美國塔吉特公司；n.目標，指標；（攻擊的）對象；靶子；v.把……作為目標；面向，對準（某群體）
target price───計劃[預定]價格，目標價格，指標價格；[物價]目標價格；指標價格
target words───目標字
coasted target───滑行目標
currycomb target───currycomb目標
benefic target───受益人目標
target profit───[會計]目標利潤；指標[計劃]利潤
state a state───州
state───adj.國家的；州的；正式的；n.（State）（羅、瑞典）斯塔特；（英）斯泰特（人名）；vt.規定；聲明；陳述；n.國家；州；情形
This target state is represented by a set of strategic goals associated with service-oriented computing.───這個目標狀態由一組跟面向服務計算相關的戰略目標描述。
During that process, the business object map transforms the source state property to the target state property.───在該過程中，業務對象映射將源state屬性轉換為目標state屬性。
Assessing the existing architecture to support the SOA target state using that architectural framework.───評估現有體系結構，以支持使用該體系結構框架的SOA目標狀態。
In general, maturity models represent a scale for assessing the current state of maturity and depicting the target state of maturity.───一般而言，成熟度模型表示一個成熟程度，用于評估當前成熟度狀態并描繪目標成熟度狀態。
A transition is a relationship between a source state vertex and a target state vertex.───轉換是源狀態頂點和目標狀態頂點之間的關系。
Based on the results of target state estimation error analyzing of this algorithm, this paper gives out an error compensation method.───根據對該算法的目標狀態估計誤差分析結果，文中給出了一種誤差補償方法。
Exact estimation of target quantity and target state is crucial for multi-target tracking.───多目標跟蹤的關鍵就是對目標數和目標狀態的準確估計。
It means to search an optimal or approximate optimal free path from start state to target state according to some optimize criterion.
Simultaneously, tax credits can target state support to approved groups, and promote socially desirable economic behaviour.
With the improved Genetic Algorithm, an all-neighbor estimation algorithm with and without the target state transition probability is designed.
Based on Multi_sensor Multi_model information, we present a new algorithm based on total information fusion estimation on target state. We prove the validity of this algorithm by computer.
This paper also analyzes the internal structure of the interface, and gives the design of PCI bus configuration and the realization of target state machine in the interface of PCI.