sdram的意思
sdram中文翻譯:
abbr.同步動態隨機存取記憶體(SynchronousDynamicrandomaccessmemory)
dram vs sdram───dram與sdram
For the problem of huge data storage, use SDRAM to store the data, and use FPGA to control SDRAM to complete the transpose.───為了解決數據量龐大、高速數據存取的問題,本文采用了FPGA芯片和同步動態存儲器(SDRAM)來實現矩陣轉置運算。
design of CPLD has adopted the output clock of image sensor to write SDRAM.───CPLD電路設計采用圖像傳感器的輸出時鐘觸發sdram寫過程。
Video data stream is stored into SDRAM via It's controller.───視頻數據流通過該控制器接收,然后存入片外sdram中。
SDRAM should not be confused with SRAM, or static RAM, which is extremely fast and expensive memory used for processor cache memory .───(請不要把SDRAM與SRAM(靜態RAM)相混淆,SRAM是速度極快且非常貴的存儲器,用于處理器的緩沖存儲器。)
adopting the sea-content memory SDRAM to solve the bottleneck problems between the memory space and the running speed of programs.───采用大容量的SDRAM,解決了存儲空間和程序執行速度的瓶頸問題。
The control of SDRAM is relatively complicated, with the design of its controller interface circuit being the key.───由于SDRAM的控制比較復雜,因此其控制器接口電路設計是關鍵。
Parameter table module is the SDRAM memory controller interface for reading parameter information when image processing.───參數表模塊主要實現SDRAM存儲器的控制器接口,用于圖像處理時讀取參數信息。
A simple, modular, extensible and portable SDRAM controller program is proposed.───提出一種簡便、模塊化、易擴展和可移植的SDRAM控制器方案。
finally, programmable address width technique is utilized to achieve the universality of SDRAM controller.───最后采用行列地址寬度可配置技術實現SDRAM控制器的通用性。
Based on the analysis of the SDRAM and DDR memory architecture, this paper presents the design principals of MBM and offers the implementation and the actual waveforms.
The SDRAM controller function module designed in this paper accesses the SDRAM with medium-high speed and accomplishes the general function.
This system consists of mass extension memory, SDRAM, LCD display and UART, etc.
This paper realizes a general SDRAM controller function module on FPGA device, which satisfying the requirements of medical imaging system.
AV video signal input into the SDRAM in the PC and then display the code above.
Alternating reading and writing of the two SDRAM that generates the jointless transmission buffer is controlled by programmable logical device FPGA.
Parameter table module is the SDRAM memory controller interface for reading parameter information when image processing.
The SDRAM has become the chief choice of the buffer storage because of its high speed, great capacity, and low price; but due to its complex control timing, it cannot directly interface with DSP.
As mass storage body, SDRAM has extensive usable value in high data processing.
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