signal timing的意思
signal timing中文翻譯:
[通信]信號定時
signal───adj.顯著的;作為信號的;n.(Signal)人名;(瑞典)西格納爾;vt.標志;用信號通知;表示;n.信號;暗號;導火線;vi.發信號
timing differences───時間性差異
signal wire───[通信]信號線
radio signal───無線電訊號;無線電信號
forenoon timing───上午時間
timing chain───[儀]定時鏈
wronging timing───錯誤的時間
timing diagram───計時圖;時間圖;正時圖,定時圖
home signal───進站信號(機);[鐵路]進站信號;[鐵路]進站信號機
optimization of signal timing is an important way to improve intersection level of service.───信號配時優化是提高平面交叉口服務水平的重要途徑。
So the signal timing is more reasonable.───因此,其配時方案更加合理。
This model with a fast solution method can be used for real-time signal timing.───這個模型及與之相應的快速求解算法,可以直接用于交叉口實時信號配時。
Signal timing algorithms and real-time data from mainline loop detectors are often used for more effective results.───信號配時算法以及主線車道實時檢測器用來實現更高效的運行。
According to different pattern, the best timing plan can be worked out by the signal timing optimizing program and the simulated software.───針對不同的交通網絡狀態模式,用信號配時優化程序和仿真軟件算出每種模式的最佳配時方案;
The model could be used in signal timing optimization, intersection design and drainage, transport cost analysis.───該模型可為信號交叉口的信號配時的優化、交叉口設計與渠化、運輸成本分析等提供參考。
Pulsed systems using signal timing to obtain vertical distance resolution, whereas continuous wave systems rely on detector focusing.───系統采用脈沖信號配時獲得的垂直距離分辨率,而連續波系統對探測器重點依賴。
The invention discloses a bus priority signal timing method based on a running schedule with the adoption of a computer program.───本發明公開了采用計算機程序的基于運行時刻表的公交優先信號配時方法。
It is critical to determine bicycle capacity at signalized intersections for signal timing design and traffic improvement.───如何確定信號控制交叉口自行車的通行能力對交叉口配時和渠化設計有重要意義。
Specifically, the network link capacity expansion problem, the road toll pricing problem and the optimal signal timing problem are discussed.
Priority is provided by optimizations of signal timing, which includes real time adjusting priority phase time, dividing priority phase and reducing non-priority phase time.
The evaluation function is optimized by genetic algorithm for obtaining the satisfying signal timing scheme.
The implementation of the general SDH device timing is introduced in this paper, which includes extracting timing signal, timing mode and controlling the SSM of signal using FPGA.
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